From e0fae087a601f0095ed0d51062005ec9f7e108f5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20Smoczy=C5=84ski?= Date: Tue, 21 Sep 2021 16:24:05 +0200 Subject: [PATCH] [BH-908] Fix macros header location MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove duplicated header for linux; move header for rt1051 to the same tree as for linux. _exit.c uses os so it should be placed in the os. Signed-off-by: Marcin Smoczyński --- board/linux/macros.h | 74 -------------- board/rt1051/CMakeLists.txt | 2 +- board/rt1051/cmsis/CMakeLists.txt | 30 ++++++ .../rt1051}/cmsis/MIMXRT1051.h | 46 +++++---- .../rt1051}/cmsis/MIMXRT1051_features.h | 0 .../rt1051}/cmsis/MIMXRT1052.h | 46 +++++---- .../rt1051}/cmsis/MIMXRT1052_features.h | 0 .../rt1051}/cmsis/arm_common_tables.h | 0 .../rt1051}/cmsis/arm_const_structs.h | 2 +- .../common => board/rt1051}/cmsis/arm_math.h | 0 .../rt1051}/cmsis/cmsis_armcc.h | 0 .../rt1051}/cmsis/cmsis_armclang.h | 0 .../rt1051}/cmsis/cmsis_compiler.h | 0 .../common => board/rt1051}/cmsis/cmsis_gcc.h | 0 .../rt1051}/cmsis/cmsis_iccarm.h | 0 .../rt1051}/cmsis/cmsis_version.h | 0 .../rt1051}/cmsis/core_armv8mbl.h | 71 ++++++++------ .../rt1051}/cmsis/core_armv8mml.h | 98 +++++++++++-------- .../common => board/rt1051}/cmsis/core_cm7.h | 62 +++++++----- .../common => board/rt1051}/cmsis/mpu_armv7.h | 0 .../common => board/rt1051}/cmsis/mpu_armv8.h | 0 .../rt1051/cmsis}/system_MIMXRT1051.h | 0 module-bsp/board/rt1051/CMakeLists.txt | 35 +------ module-bsp/board/rt1051/common/chip.hpp | 4 +- .../rt1051/common/fsl_drivers/CMakeLists.txt | 74 ++++++++++++++ .../fsl_drivers}/fsl_device_registers.h | 0 module-os/CMakeLists.txt | 2 +- module-os/board/rt1051/CMakeLists.txt | 7 ++ {board => module-os/board}/rt1051/_exit.c | 0 .../board/rt1051/include}/macros.h | 0 30 files changed, 308 insertions(+), 245 deletions(-) delete mode 100644 board/linux/macros.h create mode 100644 board/rt1051/cmsis/CMakeLists.txt rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/MIMXRT1051.h (99%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/MIMXRT1051_features.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/MIMXRT1052.h (99%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/MIMXRT1052_features.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/arm_common_tables.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/arm_const_structs.h (98%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/arm_math.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/cmsis_armcc.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/cmsis_armclang.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/cmsis_compiler.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/cmsis_gcc.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/cmsis_iccarm.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/cmsis_version.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/core_armv8mbl.h (96%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/core_armv8mml.h (97%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/core_cm7.h (97%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/mpu_armv7.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051}/cmsis/mpu_armv8.h (100%) rename {module-bsp/board/rt1051/common => board/rt1051/cmsis}/system_MIMXRT1051.h (100%) create mode 100644 module-bsp/board/rt1051/common/fsl_drivers/CMakeLists.txt rename {module-os/board/rt1051 => module-bsp/board/rt1051/common/fsl_drivers}/fsl_device_registers.h (100%) rename {board => module-os/board}/rt1051/_exit.c (100%) rename {module-bsp/board/rt1051/common => module-os/board/rt1051/include}/macros.h (100%) diff --git a/board/linux/macros.h b/board/linux/macros.h deleted file mode 100644 index d156647cc5b10f7bf4545a432f3becad113f8d6d..0000000000000000000000000000000000000000 --- a/board/linux/macros.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * @file macros.h - * @author Mateusz Piesta (mateusz.piesta@mudita.com) - * @date 31 lip 2018 - * @brief Handy macros - * @copyright Copyright (C) 2018 mudita.com - * @details - */ - -#ifndef MACROS_H_ -#define MACROS_H_ - -#include -#include -#include - -#define _STRINGIFY(s) #s -#define STRINGIFY(s) _STRINGIFY(s) - -#define UNUSED(x) ((void)(x)) - -#define ALIGN_(n) __attribute__((aligned(n))) - -#define CACHEABLE_SECTION_SDRAM(var) var - -#define CACHEABLE_SECTION_SDRAM_ALIGN(var, alignbytes) var - -#define NONCACHEABLE_SECTION_SDRAM(var) var - -#define NONCACHEABLE_SECTION_SDRAM_ALIGN(var, alignbytes) var - -#define NONCACHEABLE_SECTION_INIT(var) var - -#define NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var - -#define NONCACHEABLE_SECTION(var) var - -#define NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var - -static inline uint32_t IS_MEM_ADDR_CACHED(void *addr) -{ - extern uint32_t __sdram_non_cached_start[]; - extern uint32_t __sdram_non_cached_end[]; - extern uint32_t __ocram_cached_start[]; - extern uint32_t __ocram_cached_end[]; - extern uint32_t __dtcm_ram_start[]; - extern uint32_t __dtcm_ram_end[]; - extern uint32_t __sdram_cached_start[]; - extern uint32_t __sdram_cached_end[]; - - if (((uint32_t *)addr >= (uint32_t *)__sdram_non_cached_start) && - ((uint32_t *)addr < (uint32_t *)__sdram_non_cached_end)) { - return 0; - } - if (((uint32_t *)addr >= (uint32_t *)__ocram_cached_start) && ((uint32_t *)addr < (uint32_t *)__ocram_cached_end)) { - return 1; - } - if (((uint32_t *)addr >= (uint32_t *)__dtcm_ram_start) && ((uint32_t *)addr < (uint32_t *)__dtcm_ram_end)) { - return 0; - } - if (((uint32_t *)addr >= (uint32_t *)__sdram_cached_start) && ((uint32_t *)addr < (uint32_t *)__sdram_cached_end)) { - return 1; - } - - assert(0); -} - -//! Test if in interrupt mode -static inline bool isIRQ() -{ - return false; -} - -#endif /* MACROS_H_ */ diff --git a/board/rt1051/CMakeLists.txt b/board/rt1051/CMakeLists.txt index dfb432b946c37af0d3577c2dfb53827288f34eb2..e8afdfd86e7d04ae5027a47db23d8a09c8ed556f 100644 --- a/board/rt1051/CMakeLists.txt +++ b/board/rt1051/CMakeLists.txt @@ -1,3 +1,4 @@ +add_subdirectory(cmsis) add_subdirectory(${BOARD}) if (${MEMORY_LINKER_FILE_PATH} STREQUAL "") @@ -8,7 +9,6 @@ set (CMAKE_EXE_LINKER_FLAGS "-nostdlib -Xlinker --gc-sections -Xlinker --sort-se target_sources(board PRIVATE - _exit.c crashdump/consoledump.cpp crashdump/crashcatcher_impl.cpp crashdump/crashdumpwriter_vfs.cpp diff --git a/board/rt1051/cmsis/CMakeLists.txt b/board/rt1051/cmsis/CMakeLists.txt new file mode 100644 index 0000000000000000000000000000000000000000..d6021a68c538c868613231225fd2d67a10149f5a --- /dev/null +++ b/board/rt1051/cmsis/CMakeLists.txt @@ -0,0 +1,30 @@ +add_library(cmsis INTERFACE) + +target_include_directories(cmsis + INTERFACE + $ +) + +target_sources(cmsis + INTERFACE + arm_common_tables.h + arm_const_structs.h + arm_math.h + CMakeLists.txt + cmsis_armcc.h + cmsis_armclang.h + cmsis_compiler.h + cmsis_gcc.h + cmsis_iccarm.h + cmsis_version.h + core_armv8mbl.h + core_armv8mml.h + core_cm7.h + MIMXRT1051_features.h + MIMXRT1051.h + MIMXRT1052_features.h + MIMXRT1052.h + mpu_armv7.h + mpu_armv8.h + system_MIMXRT1051.h +) diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h b/board/rt1051/cmsis/MIMXRT1051.h similarity index 99% rename from module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h rename to board/rt1051/cmsis/MIMXRT1051.h index d16c1f19c84d686da61aa1d496b55c1a07d7d119..a344fd4c27e59b3ab1d485a40f4331e7e46c4fe8 100644 --- a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h +++ b/board/rt1051/cmsis/MIMXRT1051.h @@ -27654,14 +27654,14 @@ typedef struct uint8_t RESERVED_0[12]; __I uint32_t CHRG_DETECT_STAT; /**< USB Charger Detect Status Register, array offset: 0x1D0, array step: 0x60 */ uint8_t RESERVED_1[12]; - __IO uint32_t LOOPBACK; /**< USB Loopback Test Register, array offset: 0x1E0, array step: 0x60 */ - __IO uint32_t LOOPBACK_SET; /**< USB Loopback Test Register, array offset: 0x1E4, array step: 0x60 */ - __IO uint32_t LOOPBACK_CLR; /**< USB Loopback Test Register, array offset: 0x1E8, array step: 0x60 */ - __IO uint32_t LOOPBACK_TOG; /**< USB Loopback Test Register, array offset: 0x1EC, array step: 0x60 */ - __IO uint32_t MISC; /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */ - __IO uint32_t MISC_SET; /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */ - __IO uint32_t MISC_CLR; /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */ - __IO uint32_t MISC_TOG; /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */ + __IO uint32_t LOOPBACK; /**< USB Loopback Test Register, array offset: 0x1E0, array step: 0x60 */ + __IO uint32_t LOOPBACK_SET; /**< USB Loopback Test Register, array offset: 0x1E4, array step: 0x60 */ + __IO uint32_t LOOPBACK_CLR; /**< USB Loopback Test Register, array offset: 0x1E8, array step: 0x60 */ + __IO uint32_t LOOPBACK_TOG; /**< USB Loopback Test Register, array offset: 0x1EC, array step: 0x60 */ + __IO uint32_t MISC; /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */ + __IO uint32_t MISC_SET; /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */ + __IO uint32_t MISC_CLR; /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */ + __IO uint32_t MISC_TOG; /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */ } INSTANCE[2]; __I uint32_t DIGPROG; /**< Chip Silicon Version, offset: 0x260 */ } USB_ANALOG_Type; @@ -27924,41 +27924,49 @@ typedef struct /*! @{ */ #define USB_ANALOG_LOOPBACK_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK */ -#define USB_ANALOG_LOOPBACK_COUNT (2U) +#define USB_ANALOG_LOOPBACK_COUNT (2U) /*! @name LOOPBACK_SET - USB Loopback Test Register */ /*! @{ */ -#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK (0x1U) +#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK_SET */ -#define USB_ANALOG_LOOPBACK_SET_COUNT (2U) +#define USB_ANALOG_LOOPBACK_SET_COUNT (2U) /*! @name LOOPBACK_CLR - USB Loopback Test Register */ /*! @{ */ -#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK (0x1U) +#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK_CLR */ -#define USB_ANALOG_LOOPBACK_CLR_COUNT (2U) +#define USB_ANALOG_LOOPBACK_CLR_COUNT (2U) /*! @name LOOPBACK_TOG - USB Loopback Test Register */ /*! @{ */ -#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK (0x1U) +#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK_TOG */ -#define USB_ANALOG_LOOPBACK_TOG_COUNT (2U) +#define USB_ANALOG_LOOPBACK_TOG_COUNT (2U) /*! @name MISC - USB Misc Register */ /*! @{ */ diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051_features.h b/board/rt1051/cmsis/MIMXRT1051_features.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/MIMXRT1051_features.h rename to board/rt1051/cmsis/MIMXRT1051_features.h diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h b/board/rt1051/cmsis/MIMXRT1052.h similarity index 99% rename from module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h rename to board/rt1051/cmsis/MIMXRT1052.h index d16c1f19c84d686da61aa1d496b55c1a07d7d119..a344fd4c27e59b3ab1d485a40f4331e7e46c4fe8 100644 --- a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h +++ b/board/rt1051/cmsis/MIMXRT1052.h @@ -27654,14 +27654,14 @@ typedef struct uint8_t RESERVED_0[12]; __I uint32_t CHRG_DETECT_STAT; /**< USB Charger Detect Status Register, array offset: 0x1D0, array step: 0x60 */ uint8_t RESERVED_1[12]; - __IO uint32_t LOOPBACK; /**< USB Loopback Test Register, array offset: 0x1E0, array step: 0x60 */ - __IO uint32_t LOOPBACK_SET; /**< USB Loopback Test Register, array offset: 0x1E4, array step: 0x60 */ - __IO uint32_t LOOPBACK_CLR; /**< USB Loopback Test Register, array offset: 0x1E8, array step: 0x60 */ - __IO uint32_t LOOPBACK_TOG; /**< USB Loopback Test Register, array offset: 0x1EC, array step: 0x60 */ - __IO uint32_t MISC; /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */ - __IO uint32_t MISC_SET; /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */ - __IO uint32_t MISC_CLR; /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */ - __IO uint32_t MISC_TOG; /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */ + __IO uint32_t LOOPBACK; /**< USB Loopback Test Register, array offset: 0x1E0, array step: 0x60 */ + __IO uint32_t LOOPBACK_SET; /**< USB Loopback Test Register, array offset: 0x1E4, array step: 0x60 */ + __IO uint32_t LOOPBACK_CLR; /**< USB Loopback Test Register, array offset: 0x1E8, array step: 0x60 */ + __IO uint32_t LOOPBACK_TOG; /**< USB Loopback Test Register, array offset: 0x1EC, array step: 0x60 */ + __IO uint32_t MISC; /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */ + __IO uint32_t MISC_SET; /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */ + __IO uint32_t MISC_CLR; /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */ + __IO uint32_t MISC_TOG; /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */ } INSTANCE[2]; __I uint32_t DIGPROG; /**< Chip Silicon Version, offset: 0x260 */ } USB_ANALOG_Type; @@ -27924,41 +27924,49 @@ typedef struct /*! @{ */ #define USB_ANALOG_LOOPBACK_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK */ -#define USB_ANALOG_LOOPBACK_COUNT (2U) +#define USB_ANALOG_LOOPBACK_COUNT (2U) /*! @name LOOPBACK_SET - USB Loopback Test Register */ /*! @{ */ -#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK (0x1U) +#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_SET_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK_SET */ -#define USB_ANALOG_LOOPBACK_SET_COUNT (2U) +#define USB_ANALOG_LOOPBACK_SET_COUNT (2U) /*! @name LOOPBACK_CLR - USB Loopback Test Register */ /*! @{ */ -#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK (0x1U) +#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_CLR_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK_CLR */ -#define USB_ANALOG_LOOPBACK_CLR_COUNT (2U) +#define USB_ANALOG_LOOPBACK_CLR_COUNT (2U) /*! @name LOOPBACK_TOG - USB Loopback Test Register */ /*! @{ */ -#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK (0x1U) +#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK (0x1U) #define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT (0U) -#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK) +#define USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART(x) \ + (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & \ + USB_ANALOG_LOOPBACK_TOG_UTMI_TESTSTART_MASK) /*! @} */ /* The count of USB_ANALOG_LOOPBACK_TOG */ -#define USB_ANALOG_LOOPBACK_TOG_COUNT (2U) +#define USB_ANALOG_LOOPBACK_TOG_COUNT (2U) /*! @name MISC - USB Misc Register */ /*! @{ */ diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052_features.h b/board/rt1051/cmsis/MIMXRT1052_features.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/MIMXRT1052_features.h rename to board/rt1051/cmsis/MIMXRT1052_features.h diff --git a/module-bsp/board/rt1051/common/cmsis/arm_common_tables.h b/board/rt1051/cmsis/arm_common_tables.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/arm_common_tables.h rename to board/rt1051/cmsis/arm_common_tables.h diff --git a/module-bsp/board/rt1051/common/cmsis/arm_const_structs.h b/board/rt1051/cmsis/arm_const_structs.h similarity index 98% rename from module-bsp/board/rt1051/common/cmsis/arm_const_structs.h rename to board/rt1051/cmsis/arm_const_structs.h index d904d3796b9b1955a7cbd3c6a7a4e86d8bb58b80..84ffe8b858da6fbc1ce997994e1b9d1e193b10e3 100644 --- a/module-bsp/board/rt1051/common/cmsis/arm_const_structs.h +++ b/board/rt1051/cmsis/arm_const_structs.h @@ -31,7 +31,7 @@ #define _ARM_CONST_STRUCTS_H #include "arm_math.h" -#include "cmsis/arm_common_tables.h" +#include "arm_common_tables.h" extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; diff --git a/module-bsp/board/rt1051/common/cmsis/arm_math.h b/board/rt1051/cmsis/arm_math.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/arm_math.h rename to board/rt1051/cmsis/arm_math.h diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_armcc.h b/board/rt1051/cmsis/cmsis_armcc.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/cmsis_armcc.h rename to board/rt1051/cmsis/cmsis_armcc.h diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_armclang.h b/board/rt1051/cmsis/cmsis_armclang.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/cmsis_armclang.h rename to board/rt1051/cmsis/cmsis_armclang.h diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_compiler.h b/board/rt1051/cmsis/cmsis_compiler.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/cmsis_compiler.h rename to board/rt1051/cmsis/cmsis_compiler.h diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_gcc.h b/board/rt1051/cmsis/cmsis_gcc.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/cmsis_gcc.h rename to board/rt1051/cmsis/cmsis_gcc.h diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_iccarm.h b/board/rt1051/cmsis/cmsis_iccarm.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/cmsis_iccarm.h rename to board/rt1051/cmsis/cmsis_iccarm.h diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_version.h b/board/rt1051/cmsis/cmsis_version.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/cmsis_version.h rename to board/rt1051/cmsis/cmsis_version.h diff --git a/module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h b/board/rt1051/cmsis/core_armv8mbl.h similarity index 96% rename from module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h rename to board/rt1051/cmsis/core_armv8mbl.h index 5f85570857be0764045ee7522a655e7dc0b3f629..54201dd8ff0d24edd1c539f65f9146a4a67c0e29 100644 --- a/module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h +++ b/board/rt1051/cmsis/core_armv8mbl.h @@ -1050,8 +1050,9 @@ extern "C" (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ #define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask \ - */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk \ + (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask \ + */ #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ #define CoreDebug_DHCSR_S_RETIRE_ST_Msk \ @@ -1070,8 +1071,9 @@ extern "C" #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ #define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask \ - */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk \ + (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask \ + */ #define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ @@ -1080,8 +1082,9 @@ extern "C" #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask \ - */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk \ + (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask \ + */ /* Debug Core Register Selector Register Definitions */ #define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ @@ -1095,8 +1098,9 @@ extern "C" #define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */ #define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask \ - */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask \ + */ #define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ #define CoreDebug_DEMCR_VC_CORERESET_Msk \ @@ -1292,8 +1296,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1326,8 +1331,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1371,8 +1377,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1390,8 +1397,9 @@ extern "C" __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1408,8 +1416,9 @@ extern "C" { if ((int32_t)(IRQn) >= 0) { NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return ((uint32_t)( - ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1426,8 +1435,9 @@ extern "C" { if ((int32_t)(IRQn) >= 0) { NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return ((uint32_t)( - ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1558,9 +1568,10 @@ extern "C" __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - : 0UL)); + return ( + (uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1590,9 +1601,10 @@ extern "C" __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - : 0UL)); + return ( + (uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1633,9 +1645,10 @@ extern "C" __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - : 0UL)); + return ( + (uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); diff --git a/module-bsp/board/rt1051/common/cmsis/core_armv8mml.h b/board/rt1051/cmsis/core_armv8mml.h similarity index 97% rename from module-bsp/board/rt1051/common/cmsis/core_armv8mml.h rename to board/rt1051/cmsis/core_armv8mml.h index 015a722c8f173a82728c8273dad0d1ac353029a9..38a612214633b328fa2461fa31b7f9b781e662bd 100644 --- a/module-bsp/board/rt1051/common/cmsis/core_armv8mml.h +++ b/board/rt1051/cmsis/core_armv8mml.h @@ -730,8 +730,9 @@ extern "C" /* SCB Configurable Fault Status Register Definitions */ #define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask \ - */ +#define SCB_CFSR_USGFAULTSR_Msk \ + (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask \ + */ #define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ #define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ @@ -1882,8 +1883,9 @@ extern "C" (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ #define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask \ - */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk \ + (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask \ + */ #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ #define CoreDebug_DHCSR_S_RETIRE_ST_Msk \ @@ -1906,8 +1908,9 @@ extern "C" (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ #define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask \ - */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk \ + (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask \ + */ #define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ @@ -1916,8 +1919,9 @@ extern "C" #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask \ - */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk \ + (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask \ + */ /* Debug Core Register Selector Register Definitions */ #define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ @@ -1943,8 +1947,9 @@ extern "C" #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ #define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask \ - */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask \ + */ #define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ @@ -1953,15 +1958,17 @@ extern "C" #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ #define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask \ - */ +#define CoreDebug_DEMCR_VC_STATERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask \ + */ #define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask \ - */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask \ + */ #define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ @@ -2196,8 +2203,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2230,8 +2238,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2275,8 +2284,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2294,8 +2304,9 @@ extern "C" __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2312,8 +2323,9 @@ extern "C" { if ((int32_t)(IRQn) >= 0) { NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return ((uint32_t)( - ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2330,8 +2342,9 @@ extern "C" { if ((int32_t)(IRQn) >= 0) { NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return ((uint32_t)( - ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2399,9 +2412,9 @@ extern "C" PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) - ? (uint32_t)0UL - : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) + ? (uint32_t)0UL + : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); return (((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | ((SubPriority & (uint32_t)((1UL << (SubPriorityBits)) - 1UL)))); @@ -2430,9 +2443,9 @@ extern "C" PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) - ? (uint32_t)0UL - : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) + ? (uint32_t)0UL + : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); *pSubPriority = (Priority) & (uint32_t)((1UL << (SubPriorityBits)) - 1UL); @@ -2539,9 +2552,10 @@ extern "C" __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - : 0UL)); + return ( + (uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2571,9 +2585,10 @@ extern "C" __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - : 0UL)); + return ( + (uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2614,9 +2629,10 @@ extern "C" __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - : 0UL)); + return ( + (uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); diff --git a/module-bsp/board/rt1051/common/cmsis/core_cm7.h b/board/rt1051/cmsis/core_cm7.h similarity index 97% rename from module-bsp/board/rt1051/common/cmsis/core_cm7.h rename to board/rt1051/cmsis/core_cm7.h index c0e1982fd080cc265a0a6ef17bea90f408b37371..3a97947fb3630ebce65437ccb0c1b43ece4707bb 100644 --- a/module-bsp/board/rt1051/common/cmsis/core_cm7.h +++ b/board/rt1051/cmsis/core_cm7.h @@ -657,8 +657,9 @@ extern "C" /* SCB Configurable Fault Status Register Definitions */ #define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask \ - */ +#define SCB_CFSR_USGFAULTSR_Msk \ + (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask \ + */ #define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ #define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ @@ -1634,8 +1635,9 @@ extern "C" #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ #define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask \ - */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk \ + (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask \ + */ #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ #define CoreDebug_DHCSR_S_RETIRE_ST_Msk \ @@ -1658,8 +1660,9 @@ extern "C" (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ #define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask \ - */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk \ + (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask \ + */ #define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ @@ -1668,8 +1671,9 @@ extern "C" #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask \ - */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk \ + (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask \ + */ /* Debug Core Register Selector Register Definitions */ #define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ @@ -1695,8 +1699,9 @@ extern "C" #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ #define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask \ - */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask \ + */ #define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ @@ -1705,15 +1710,17 @@ extern "C" #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ #define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask \ - */ +#define CoreDebug_DEMCR_VC_STATERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask \ + */ #define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask \ - */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk \ + (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask \ + */ #define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ @@ -1892,8 +1899,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1926,8 +1934,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -1971,8 +1980,9 @@ extern "C" __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { - return ((uint32_t)( - ((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + return ((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) + ? 1UL + : 0UL)); } else { return (0U); @@ -2039,9 +2049,9 @@ extern "C" PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) - ? (uint32_t)0UL - : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) + ? (uint32_t)0UL + : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); return (((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | ((SubPriority & (uint32_t)((1UL << (SubPriorityBits)) - 1UL)))); @@ -2070,9 +2080,9 @@ extern "C" PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) - ? (uint32_t)0UL - : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) + ? (uint32_t)0UL + : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); *pSubPriority = (Priority) & (uint32_t)((1UL << (SubPriorityBits)) - 1UL); diff --git a/module-bsp/board/rt1051/common/cmsis/mpu_armv7.h b/board/rt1051/cmsis/mpu_armv7.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/mpu_armv7.h rename to board/rt1051/cmsis/mpu_armv7.h diff --git a/module-bsp/board/rt1051/common/cmsis/mpu_armv8.h b/board/rt1051/cmsis/mpu_armv8.h similarity index 100% rename from module-bsp/board/rt1051/common/cmsis/mpu_armv8.h rename to board/rt1051/cmsis/mpu_armv8.h diff --git a/module-bsp/board/rt1051/common/system_MIMXRT1051.h b/board/rt1051/cmsis/system_MIMXRT1051.h similarity index 100% rename from module-bsp/board/rt1051/common/system_MIMXRT1051.h rename to board/rt1051/cmsis/system_MIMXRT1051.h diff --git a/module-bsp/board/rt1051/CMakeLists.txt b/module-bsp/board/rt1051/CMakeLists.txt index bce196f00401464950026f68c5b6a319165832c1..19b88011b6927464b8fd037180e55c0196e61820 100644 --- a/module-bsp/board/rt1051/CMakeLists.txt +++ b/module-bsp/board/rt1051/CMakeLists.txt @@ -34,36 +34,6 @@ target_sources(module-bsp common/audio.cpp common/board.cpp common/chip.cpp - common/fsl_drivers/fsl_adc.c - common/fsl_drivers/fsl_cache.c - common/fsl_drivers/fsl_clock.c - common/fsl_drivers/fsl_clock.c - common/fsl_drivers/fsl_common.c - common/fsl_drivers/fsl_dcdc.c - common/fsl_drivers/fsl_dmamux.c - common/fsl_drivers/fsl_edma.c - common/fsl_drivers/fsl_flexram.c - common/fsl_drivers/fsl_gpc.c - common/fsl_drivers/fsl_gpio.c - common/fsl_drivers/fsl_gpt.c - common/fsl_drivers/fsl_lpi2c.c - common/fsl_drivers/fsl_lpspi_edma.c - common/fsl_drivers/fsl_lpspi.c - common/fsl_drivers/fsl_lpuart_edma.c - common/fsl_drivers/fsl_lpuart.c - common/fsl_drivers/fsl_pit.c - common/fsl_drivers/fsl_pmu.c - common/fsl_drivers/fsl_pwm.c - common/fsl_drivers/fsl_rtwdog.c - common/fsl_drivers/fsl_sai_edma.c - common/fsl_drivers/fsl_sai.c - common/fsl_drivers/fsl_semc.c - common/fsl_drivers/fsl_snvs_hp.c - common/fsl_drivers/fsl_snvs_lp.c - common/fsl_drivers/fsl_src.c - common/fsl_drivers/fsl_usdhc.c - common/fsl_drivers/fsl_wdog.c - common/fsl_drivers/fsl_qtmr.c common/startup_mimxrt1052.cpp common/system_MIMXRT1051.c drivers/RT1051DriverDMA.cpp @@ -87,8 +57,6 @@ target_include_directories(module-bsp ${CMAKE_CURRENT_SOURCE_DIR} ${CMAKE_CURRENT_SOURCE_DIR}/bsp ${CMAKE_CURRENT_SOURCE_DIR}/common - ${CMAKE_CURRENT_SOURCE_DIR}/common/fsl_drivers - ${CMAKE_CURRENT_SOURCE_DIR}/common/cmsis ${CMAKE_SOURCE_DIR}/module-bluetooth/Bluetooth ${CMAKE_SOURCE_DIR}/module-sys/ @@ -102,4 +70,7 @@ set_source_files_properties( target_compile_definitions(module-bsp PUBLIC USB_STACK_FREERTOS) +add_subdirectory(common/fsl_drivers) add_subdirectory(${BOARD}) + +target_link_libraries(module-bsp PUBLIC cmsis fsl) diff --git a/module-bsp/board/rt1051/common/chip.hpp b/module-bsp/board/rt1051/common/chip.hpp index 4d1e19c97eb1fa74d259737e03c21e3ce7c78057..46d8b61dfad9fe9042d285739f6a0abff859dcd7 100644 --- a/module-bsp/board/rt1051/common/chip.hpp +++ b/module-bsp/board/rt1051/common/chip.hpp @@ -6,8 +6,8 @@ #include extern "C" { -#include "cmsis/cmsis_gcc.h" -#include "cmsis/core_cm7.h" +#include "cmsis_gcc.h" +#include "core_cm7.h" #include "fsl_drivers/fsl_src.h" #include "macros.h" } diff --git a/module-bsp/board/rt1051/common/fsl_drivers/CMakeLists.txt b/module-bsp/board/rt1051/common/fsl_drivers/CMakeLists.txt new file mode 100644 index 0000000000000000000000000000000000000000..84c8dd1320326cdc5c4f37facb181d028b6878f7 --- /dev/null +++ b/module-bsp/board/rt1051/common/fsl_drivers/CMakeLists.txt @@ -0,0 +1,74 @@ +add_library(fsl STATIC) + +target_sources(fsl + PRIVATE + fsl_adc.c + fsl_cache.c + fsl_clock.c + fsl_common.c + fsl_dcdc.c + fsl_dmamux.c + fsl_edma.c + fsl_flexram.c + fsl_gpc.c + fsl_gpio.c + fsl_gpt.c + fsl_lpi2c.c + fsl_lpspi.c + fsl_lpspi_edma.c + fsl_lpuart.c + fsl_lpuart_edma.c + fsl_pit.c + fsl_pmu.c + fsl_pwm.c + fsl_qtmr.c + fsl_rtwdog.c + fsl_sai.c + fsl_sai_edma.c + fsl_semc.c + fsl_snvs_hp.c + fsl_snvs_lp.c + fsl_src.c + fsl_usdhc.c + fsl_wdog.c + + PUBLIC + fsl_adc.h + fsl_cache.h + fsl_clock.h + fsl_common.h + fsl_dcdc.h + fsl_device_registers.h + fsl_dmamux.h + fsl_edma.h + fsl_flexram.h + fsl_gpc.h + fsl_gpio.h + fsl_gpt.h + fsl_iomuxc.h + fsl_lpi2c.h + fsl_lpspi_edma.h + fsl_lpspi.h + fsl_lpuart_edma.h + fsl_lpuart.h + fsl_pit.h + fsl_pmu.h + fsl_pwm.h + fsl_qtmr.h + fsl_rtwdog.h + fsl_sai_edma.h + fsl_sai.h + fsl_semc.h + fsl_snvs_hp.h + fsl_snvs_lp.h + fsl_src.h + fsl_usdhc.h + fsl_wdog.h +) + +target_include_directories(fsl + PUBLIC + $ +) + +target_link_libraries(fsl PUBLIC cmsis) diff --git a/module-os/board/rt1051/fsl_device_registers.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_device_registers.h similarity index 100% rename from module-os/board/rt1051/fsl_device_registers.h rename to module-bsp/board/rt1051/common/fsl_drivers/fsl_device_registers.h diff --git a/module-os/CMakeLists.txt b/module-os/CMakeLists.txt index 46d9f8834e291e35233a6e6d799a9d202248bb31..97502e8fdc293101903527a42d6c3f5a6ee82b4c 100644 --- a/module-os/CMakeLists.txt +++ b/module-os/CMakeLists.txt @@ -79,4 +79,4 @@ if((${PROJECT_TARGET} STREQUAL "TARGET_RT1051") AND (${SYSTEM_VIEW_ENABLED})) target_link_libraries(${PROJECT_NAME} PUBLIC segger::systemview) endif() -target_link_libraries(${PROJECT_NAME} PUBLIC module-bsp module-utils) +target_link_libraries(${PROJECT_NAME} PUBLIC module-utils) diff --git a/module-os/board/rt1051/CMakeLists.txt b/module-os/board/rt1051/CMakeLists.txt index 7e31006be535896013596c491725e067f42d2bbc..646e4a6c76265cb6bc71bd05d11d5d8f8e0d2999 100644 --- a/module-os/board/rt1051/CMakeLists.txt +++ b/module-os/board/rt1051/CMakeLists.txt @@ -1,6 +1,7 @@ target_sources( module-os PRIVATE + _exit.c fsl_tickless_gpt.c fsl_tickless_systick.c fsl_runtimestat_gpt.c @@ -24,5 +25,11 @@ target_include_directories( $<$>: ${CMAKE_CURRENT_SOURCE_DIR} > + ${CMAKE_CURRENT_SOURCE_DIR}/include > ) + +target_link_libraries(module-os + PUBLIC + cmsis +) diff --git a/board/rt1051/_exit.c b/module-os/board/rt1051/_exit.c similarity index 100% rename from board/rt1051/_exit.c rename to module-os/board/rt1051/_exit.c diff --git a/module-bsp/board/rt1051/common/macros.h b/module-os/board/rt1051/include/macros.h similarity index 100% rename from module-bsp/board/rt1051/common/macros.h rename to module-os/board/rt1051/include/macros.h