From ed510872ace66b1987b86b79ed2b1dcafab7a8f4 Mon Sep 17 00:00:00 2001
From: kn0000 <kn0000@aleteoryx.me>
Date: Thu, 13 Mar 2025 03:23:44 +0000
Subject: [PATCH] Initial commit, baseline implementation.
---
.gitignore | 1 +
Cargo.lock | 7 ++++
Cargo.toml | 6 ++++
src/lib.rs | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++++
src/main.rs | 3 ++
5 files changed, 109 insertions(+)
create mode 100644 .gitignore
create mode 100644 Cargo.lock
create mode 100644 Cargo.toml
create mode 100644 src/lib.rs
create mode 100644 src/main.rs
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..ea8c4bf
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+/target
diff --git a/Cargo.lock b/Cargo.lock
new file mode 100644
index 0000000..e65da42
--- /dev/null
+++ b/Cargo.lock
@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 4
+
+[[package]]
+name = "implementation"
+version = "0.1.0"
diff --git a/Cargo.toml b/Cargo.toml
new file mode 100644
index 0000000..a5fb76e
--- /dev/null
+++ b/Cargo.toml
@@ -0,0 +1,6 @@
+[package]
+name = "implementation"
+version = "0.1.0"
+edition = "2024"
+
+[dependencies]
diff --git a/src/lib.rs b/src/lib.rs
new file mode 100644
index 0000000..b5fe4f0
--- /dev/null
+++ b/src/lib.rs
@@ -0,0 +1,92 @@
+struct Processor {
+ stack_a: Vec<u16>,
+ stack_b: Vec<u16>,
+ pub memory: [u16;1024],
+ carry: bool,
+ pub pc: u16 //program counter
+}
+
+impl Processor {
+ pub fn run(&mut self) {
+ let instruction = self.memory[self.pc as usize];
+ let mut is_jump = false;
+ match instruction & 0x300 {
+ 0x000 => self.carry = calc(&mut self.stack_a, instruction, self.carry),
+ 0x100 => self.carry = calc(&mut self.stack_a, instruction, self.carry),
+ 0x200 => self.stack_a.push(instruction & 0xFF),
+ 0x300 => {
+ if (instruction & 0x80) != 0 {
+ let conditional = (instruction & 0x40) != 0;
+ let relative = (instruction & 0x20) != 0;
+ let save_pc = (instruction & 0x10) != 0;
+ if !conditional || self.carry {
+ let address = self.stack_a.pop().expect("End of stack");
+ if save_pc {self.stack_a.push(self.pc+1)};
+ if relative {self.pc += address}
+ else {self.pc = address};
+ is_jump = true;
+ }
+ }
+ else {
+ let toggle = (instruction & 0x40) != 0;
+ let mut stack;
+ if toggle {stack = &mut self.stack_b;}
+ else {stack = &mut self.stack_a;};
+ match instruction & 0x3F {
+ 0 => { //swap top 2
+ let a = stack.pop().expect("End of stack");
+ let b = stack.pop().expect("End of stack");
+ stack.push(a);
+ stack.push(b);
+ }
+ 1 => { //clone top
+ let a = stack.pop().expect("End of stack");
+ stack.push(a);
+ stack.push(a);
+ }
+ 2 => { //clone second
+ let a = stack.pop().expect("End of stack");
+ let b = stack.pop().expect("End of stack");
+ stack.push(b);
+ stack.push(a);
+ stack.push(b);
+ }
+ 3 => { //move between stacks
+ if toggle {self.stack_a.push(self.stack_b.pop().expect("End of stack"));}
+ else {self.stack_b.push(self.stack_a.pop().expect("End of stack"));};
+ }
+ 4 => { //push/pop
+ let addr = self.stack_a.pop().expect("End of stack") as usize;
+ if toggle {
+ let value = self.stack_a.pop().expect("End of stack");
+ self.memory[addr] = value;
+ }
+ else {self.stack_a.push(self.memory[addr]);};
+ }
+ 5 => { //set/clear carry
+ self.carry = toggle;
+ }
+ _ => ()
+ }
+ }
+ }
+ _ => unreachable!()
+ }
+ if !is_jump {self.pc += 1};
+ }
+}
+
+fn calc(stack: &mut Vec::<u16>, instruction: u16, carry_in: bool) -> bool {
+ let operand_a = stack.pop().expect("End of stack");
+ let operand_b = stack.pop().expect("End of stack");
+ let mut carry = carry_in;
+ let mut result = 0;
+ for i in 0..10 {
+ let bit = 1 << i;
+ let count = ((operand_a & bit) >> i) + ((operand_b & bit) >> i) + carry as u16;
+ result += ((instruction & (1<<(count+4))) >> count) << i;
+ carry = (instruction & (1<<count)) != 0;
+ }
+ stack.push(result);
+ carry
+}
diff --git a/src/main.rs b/src/main.rs
new file mode 100644
index 0000000..e7a11a9
--- /dev/null
+++ b/src/main.rs
@@ -0,0 +1,3 @@
+fn main() {
+ println!("Hello, world!");
+}
--
2.45.2