From 1ac1ad24ff0febbb6f6a999d64e7bdf50ff62fa8 Mon Sep 17 00:00:00 2001 From: Madeline Cronin Date: Mon, 2 Sep 2024 21:36:00 +0100 Subject: [PATCH] Implement the rest of the arithmetic ops. This implements subtraction, multiplication, and division, as well as the associated checks for overflows and div by 0 --- src/processor.rs | 42 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/src/processor.rs b/src/processor.rs index 2ee654a..70507bb 100644 --- a/src/processor.rs +++ b/src/processor.rs @@ -72,7 +72,47 @@ impl <'a> Processor<'a> { else {self.reg[operands.2] = self.reg[operands.0].wrapping_add(self.reg[operands.1])}; } 0x0001 => { //Subtraction - + if toggles.1 { + (self.reg[operands.2], self.flags[toggles.2 as usize]) = { + if toggles.0 { + let (uncast_return, flag) = (self.reg[operands.0] as i16).overflowing_add(-(self.reg[operands.1] as i16)); + (uncast_return as u16, flag) + } + else { + (self.reg[operands.0].wrapping_sub(self.reg[operands.1]), self.reg[operands.0] < self.reg[operands.1]) + } + } + } + else { + self.reg[operands.2] = self.reg[operands.0].wrapping_sub(self.reg[operands.1]); + } + } + 0x0002 => { //Multiplication + if toggles.1 { + (self.reg[operands.2], self.flags[toggles.2 as usize]) = { + if toggles.0 { + let (uncast_return, flag) = (self.reg[operands.1] as i16).overflowing_mul(self.reg[operands.1] as i16); + (uncast_return as u16, flag) + } + else { + self.reg[operands.0].overflowing_mul(self.reg[operands.1]) + } + } + } + else { + self.reg[operands.2] = self.reg[operands.0].wrapping_mul(self.reg[operands.1]); + } + } + 0x0003 => { + if self.reg[operands.2] == 0 && toggles.1 {self.flags[toggles.2 as usize] = true} + else if self.reg[operands.2] != 0 { + if toggles.0 { + self.reg[operands.2] = ((self.reg[operands.0] as i16)/(self.reg[operands.1] as i16)) as u16; + } + else { + self.reg[operands.2] = self.reg[operands.0]/self.reg[operands.1]; + } + } } _ => return true } -- 2.43.4