1 files changed, 49 insertions(+), 0 deletions(-)

M src/processor.rs

@@ 190,6 190,55 @@ impl <'a> Processor<'a> {
                 self.reg[31] += 2;
                 return false
             }
+            0x0400 => { //Control flow
+                let toggles: (bool,bool,bool,bool,bool,bool) = ( //J,S,P,I,TT, see ISA for meanings
+                    (instruction.0 & 0x0080) != 0,
+                    (instruction.0 & 0x0040) != 0,
+                    (instruction.0 & 0x0020) != 0,
+                    (instruction.0 & 0x0010) != 0,
+                    (instruction.0 & 0x0008) != 0,
+                    (instruction.0 & 0x0004) != 0,
+                );
+                
+                if self.itr_toggle && toggles.3 { //Software interrupt
+                    if toggles.1 {   //Push what would have been the next address to stack
+                        self.memory[self.reg[30] as usize] = self.reg[31] + 2;
+                        self.reg[30] -= 1;
+                    }                 
+                    self.reg[31] = 0; //Jump to zero
+                    if toggles.4 { //Set the interrupt toggle
+                        self.itr_toggle = toggles.5;
+                    }
+
+                    return false
+                }
+                let address = {
+                    if toggles.2 { //Pop from the stack
+                        self.reg[30] += 1;
+                        self.memory[self.reg[30] as usize]
+                    }
+                    else { //Use a register value
+                        let operand: usize = (instruction.1 & 0xF800) >> 11 as usize;
+                        self.reg[operand]
+                    }
+                }
+
+                if toggles.1 { //Push to stack
+                    self.memory[self.reg[30] as usize] = self.reg[31] + 2;
+                    self.reg[30] -= 1;
+                }
+                if toggles.0 { //Relative jump
+                    self.reg[31].wrapping_add(address);
+                }
+                else { //Static jump
+                    self.reg[31] = address;
+                }
+
+                if toggles.4 { //Set the interrupt enable bit
+                    self.itr_toggle = toggles.5; 
+                }
+                return false
+            }
             _ => return true,
         }
     }