From 67a7a4393be532f0f7043a0649389e2d030c7bf0 Mon Sep 17 00:00:00 2001
From: Madeline Cronin <maddie.henlo@gmail.com>
Date: Tue, 27 Aug 2024 00:38:47 +0100
Subject: [PATCH] Initial commit Creates processor.rs as well as the processor
 struct and the start of the code for executing instructions.

---
 .gitignore       |  3 +++
 Cargo.lock       |  7 +++++++
 Cargo.toml       |  8 ++++++++
 src/main.rs      |  5 +++++
 src/processor.rs | 35 +++++++++++++++++++++++++++++++++++
 5 files changed, 58 insertions(+)
 create mode 100644 .gitignore
 create mode 100644 Cargo.lock
 create mode 100644 Cargo.toml
 create mode 100644 src/main.rs
 create mode 100644 src/processor.rs

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..b0c2531
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+/target
+*~
+*.swp
diff --git a/Cargo.lock b/Cargo.lock
new file mode 100644
index 0000000..af5b2cd
--- /dev/null
+++ b/Cargo.lock
@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "simulator"
+version = "0.1.0"
diff --git a/Cargo.toml b/Cargo.toml
new file mode 100644
index 0000000..62fcb61
--- /dev/null
+++ b/Cargo.toml
@@ -0,0 +1,8 @@
+[package]
+name = "simulator"
+version = "0.1.0"
+edition = "2021"
+
+# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
+
+[dependencies]
diff --git a/src/main.rs b/src/main.rs
new file mode 100644
index 0000000..3adac58
--- /dev/null
+++ b/src/main.rs
@@ -0,0 +1,5 @@
+mod processor;
+
+fn main() {
+    println!("Hello, world!");
+}
diff --git a/src/processor.rs b/src/processor.rs
new file mode 100644
index 0000000..96e7025
--- /dev/null
+++ b/src/processor.rs
@@ -0,0 +1,35 @@
+pub struct Processor<'a> {
+    reg: [u16;32],
+    flags: [bool;2], //flag A, then B
+    itr_toggle: bool,
+    pub memory: &'a mut [u16],
+    pub disk: &'a mut [u16],
+}
+
+pub fn new<'a>(memory: &'a mut [u16], disk: &'a mut [u16]) -> Processor<'a> {
+    Processor {
+        reg: [0;32],
+        flags: [false;2],
+        itr_toggle: false,
+        memory,
+        disk
+    }
+}
+
+impl <'a> Processor<'a> {
+    ///Runs the processor through one instruction.
+    pub fn run(&mut self) {
+        let instruction: (u16,u16) = (self.disk[self.reg[31] as usize],self.disk[self.reg[31] as usize +1]);
+        let conditions: ((bool,bool),(bool,bool)) = (( //.0.x is activations, .1.x is conditions
+                (instruction.0 & 0x80) != 0,
+                (instruction.0 & 0x40) != 0),(
+                (instruction.0 & 0x20) != 0,
+                (instruction.0 & 0x10) != 0)
+        );
+        if (conditions.0.0 && (conditions.1.0 != self.flags[0])) || (conditions.0.1 && (conditions.1.1 != self.flags[1])) {
+            self.reg[31] += 2; //update the program counter at the end of the instruction
+                               //execution.
+            return; //if the conditions are not met, perform no further calculations.
+        }
+    }
+}
-- 
2.43.4