@@ 14,7 14,7 @@ The numbers: 16 bit words, 2-word fixed instruction length, 32 16-bit registers,
Features: All instructions can have conditional execution attached.
Hardware and software interrupts are toggleable. Serial port I/O intended for
-interfacing with STDIN/STDOUT on simulated versions.
+interfacing with STDIN/STDOUT on simulated versions. Load/Store architecture.
Registers: 32 registers, with registers #28-31 (zero indexed) reserved for the
following special purposes, in order: disk index, stack pointer, program
@@ 24,7 24,7 @@ also a 2 bit flags register for storing the condition flags.
Behaviours: Upon power up, the first 512 words of disk are copied to main
memory. The only statefulness not directly controlled by programs is the
-interrupt toggle.
+interrupt toggle. Numbers are read as big endian.
Versioning: The versioning of this ISA is such that minor versions are
backwards compatible, while major versions have one or more breaking changes
@@ 78,7 78,7 @@ XXXX=
Logical:
----0010|ZFRIXXXX|--------|--------
Z: (Z=1) Update the specified condition flag if the result is zero
-F: Specifies (F=0) flag A or (F=1) flag B
+F: Specifies (f=0) flag A or (f=1) flag B
R: (I=1) Invert the flag write
I: (I=1) Invert the result, acts before the zero check
@@ 89,7 89,7 @@ XXXX=
Condition check:
----0011|FIXX----|--------|--------
-F: (I=1) Invert the flag write
+F: Specifies (f=0) flag A or (f=1) flag B
I: (I=0) Normal write, (I=1) inverted write
XX=
@@ 128,3 128,34 @@ XXX=
Immediate value:
----0110|RRRRR---|xxxxxxxx|xxxxxxxx
Writes the value denoted by x's to the register of index RRRRR
+
+
+-Instruction descriptions:
+--------|--------|11111222|2233333-
+11111: Operand 1
+22222: Operand 2
+33333: Operand 3
+
+Arithmetic:
+Addition, subtraction, multiplications, and integer division all take 3
+operands, and operate on the described registers in the order of 3 = 1 (+-x/) 2
+
+Logical:
+All logical operations take 3 operands, and operate on the described registers
+in the order 3 = 1 (OP) 2
+
+Condition check:
+Takes 2 operands, and performs the described check in the order of 1 (<,=,>) 2
+
+Control flow:
+Takes 1 operand, describing the register of the address/value to be used,
+which is ignored if using a stack value
+
+Memory access:
+Takes 2 operands, the first describes the register to write from/read to, and
+the second describing the register containing the target memory address.
+When reading/writing to disk, the address is further offset by the disk index
+register multiplied by 2^16
+
+Immediate value:
+Already fully described above.