~maddie/custom-processor-specification

edcc31600a73e699770de6386de9967c34d5f99d — Madeline Cronin 3 months ago 7473ada
Removed the special register for interrupts.
More specifically, the interrupt register was an accidental holdover that
will be replaced by moving the behaviour to the platform architecture.
1 files changed, 3 insertions(+), 3 deletions(-)

M ISA_spec.txt
M ISA_spec.txt => ISA_spec.txt +3 -3
@@ 1,4 1,4 @@
Maddie's test ISA Version 1.0.3
Maddie's test ISA Version 1.0.4


Table of contents:


@@ 16,9 16,9 @@ Features: All instructions can have conditional execution attached.
Hardware and software interrupts are toggleable. Serial port I/O intended for
interfacing with STDIN/STDOUT on simulated versions. Load/Store architecture.

Registers: 32 registers, with registers #28-31 (zero indexed) reserved for the
Registers: 32 registers, with registers #29-31 (zero indexed) reserved for the
following special purposes, in order: disk index, stack pointer, program
counter, and interrupt register. The program counter is freely readable, but
counter. The program counter is freely readable, but
only modifiable through instructions in the control flow category. There is
also a 2 bit flags register for storing the condition flags.