[BH-1714] Handling eink initialization errors Added error detection while eink initialization. Added mechanism to reinitialize the eink in case of error.
[BH-1714] Eink refactor and error handling Cleanup and refactor for eink code. Changed turning on/off procedure. Add error handling.
[BH-1730] Fix enter into SNVS mode If the CPU fails during changing the frequency the device can stuck in SNVS mode. So the CPU frequency is checked and if the frequency is wrong the CPU doesn’t enter SNVS mode. The watchdog should restart the CPU.
[MOS-599] Fix undefined phone mode in simulator Fix of the issue that on simulator phone mode was in 'undefined' state, what resulted in no phone mode selected in settings.
[MOS-998] Provide additional info in crashdump filename Added info about product, OS version and commit hash to crashdump filename to simplify analysis of the crashdumps without corresponding logs available.
[BH-1717] Fix no clock update The secure RTC can lock and the clock is not updated. To prevent this situation we reset LP registers (except for timestamps and alarms) and clear the LVD flag. Then we enable again LP SRTC.
[MOS-997] Fix failing sync with Mudita Center Fix of the issue that sync with Mudita Center would fail often after changes introduced in CP-1968.
[BH-1708] Fix buttons behavior When the button is pressed/released we get an interrupt which falls or rises edge. We read the gpio state a bit later so in case of debouncing we can register the wrong pin state. After the debounce interval the state is stable.
[BH-1718] Add extra logs to the RTC module Add extra logs when the RTC timeout error occurs. In that, we can find reason in registers of what happened.
[MOS-238] Use on-chip hardware TRNG as an entropy source Use hardware TRNG integrated into RT1051 MCU as an entropy source for builds complied for RT1051.
[MOS-183] Fix RT1051 debug build Fix of multiple issues that resulted in debug build failing.
[MOS-230] Print last instruction address before RTWDOG reset Added mechanism that stores address of last executed instruction before RTWDOG timeout to enable some basic debugging in such cases, as such resets do not create crashdumps and leave no information in logs.
[BH-1701] Add extended user heap statistics for debugging Added extended statistics to help track potential memory leaks: * used user heap size per task * number of successful allocations * number of successful frees
[BH-1702] Fix RTWDOG main DCDC reset Fix of the issue that RTWDOG performed only CPU reset in case of timeout due to IRQ misconfiguration resulting in RTWDOG handler not being called.
[BH-1673] Fixes for Harmony random resets Next part of Harmony random resets fixes: * added RC OSC startup delay as in newest lpm.c; * changed order of clock source, oscillator and LDO switching; * removed connecting internal DCDC load resistor, as it is only required to speed up converter startup after it was turned off completely; * changed DCDC operation mode to continuous conduction; * set low VDD_SOC_IN voltage back to 950mV as suggested in RM. * added switching DCDC converter mode to discontinuous conduction for two lowest CPU clock frequencies, as using CCM mode resulted in very high current consumption that would shorten Harmony's life on battery significantly.
[BH-1700] Add date and time to logs at the startup Save date and time at the startup of the system for analysis purposes.
[BH-1673] Harmony random resets fixes * Switching VDD_SOC_IN only after PLL2 is turned off. * Weak LDO stabilization delay. * Removed switching to 1.275V before frequency change. * Cleanups in LDO switching. * Removed switching PeriphClk2Div for fCPU <= 24MHz, using AhbDiv instead. * Removed log from _exit that caused logger mutex deadlock
[MOS-686] Fixed MTP availability only after phone unlocked Fixed file access via MTP even when phone is not unlocked. Now access is granted when the phone is unlocked by the user entering a passcode. If the phone is not passcode protected (passcode is nor set) then access to the files is always possible via MTP.
[BH-1595] USB reset procedure * Fixed incorrect reset procedure * Minor refactor
[BH-1694] Increase CPU core voltage from 900mV to 975mV Previous voltage setting was lower than the one suggested in RT1051 RM and would lead to CPU instability in certain conditions.