Clarify division by 0 behaviour.
Clarifies that division by 0 is a no-op on the main registers.
Clarify that the overflow flag write also includes division by 0
Tweak interrupt toggle behaviour.
This is done in anticipation of potential bugs caused by software interrupts getting interrupted by
hardware interrupts, this change enables interrupts to be disabled in the same instruction as
performing a hardware interrupt, reducing the risk of potential clashes.
Clarify the condition flag behaviour.
Clarified unknown opcode behaviour.
Specified that unknown opcodes are to be treated as a halt instruction.
Removed the special register for interrupts.
More specifically, the interrupt register was an accidental holdover that
will be replaced by moving the behaviour to the platform architecture.
Remove the 512 word copy behaviour and change references to RAM
The removal is because the copy behaviour would be better placed in a platform architecture
the references to RAM are changed to be "main memory" so that a platform architecture can use different
blocks of main memory for different purposes.
Moved the drafts into a folder and added a small readme for them.
Rename the ISA spec file
This is to facilitate including other relevant specifications here, namely a system architecture to surround the
instruction set.
Specified the behaviour of hardware interrupts.
Renamed the specification document, and minor tweaks.
Changed the versioning to SemVer since it was already close to it, and fixed some capitalisation issues.
Write instruction descriptions.
In particular, this specifies the operand positions and usages.
Second pass for overview and instruction categories.
Made the overview easier to read by grouping details more sensibly, and made the descriptions
in the instruction categories more consistent.
Initial Commit
Add first and second draft of spec and unfinished first version